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may 2007 rev 7 1/26 1 stm6321/6322 stm6821/6822/6823/6824/6825 5-pin supervisor with watchdog timer and push-button reset features precision v cc monitoring of 5, 3.3, 3, or 2.5v power supplies rst outputs (active-low, push-pull or open drain) rst outputs (active-high, push-pull) reset pulse width of 1.4ms, 200ms and 240ms (typ) (a) watchdog timeout period of 1.6s (typ) (a) manual reset input (mr ) low supply current - 3a (typ) guaranteed rst (rst) assertion down to v cc = 1.0v operating temperature: ?40 to +85c (industrial grade) rohs compliance lead-free components are compliant with the rohs directive. a. other t rec and watchdog timings are offered. mini mum order quantities may apply. contact local sales office for availability. sot23-5 (wy) table 1. device options part number watchdog input manual reset input reset output active-low (push-pull) active-high (push-pull) active-low (open drain) stm6321 ??? stm6322 ??? stm6821 ?? ? stm6822 ?? ? stm6823 ??? stm6824 ??? stm6825 ??? www.st.com
contents stm6321/6322stm6821/6822/6823/6824/6825 2/26 contents 1 summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.1 pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.1.1 active-low, push-pull reset output (rst) - stm6822/6823/6824/6825 . . 7 1.1.2 active-low, open drain reset output (rst) - stm6321/6322/6822 . . . . . 7 1.1.3 push-button reset input (mr) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.1.4 watchdog input (wdi) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.1.5 active-high reset output (rst) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2 operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.1 reset output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.2 open drain rst output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.3 push-button reset input (stm6322/6821/6822/6823/6825) . . . . . . . . . . . 11 2.4 watchdog input (stm6321/6821/6822/6823/6824) . . . . . . . . . . . . . . . . . 11 2.5 applications information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.5.1 watchdog input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.5.2 ensuring a valid reset output down to v cc = 0v . . . . . . . . . . . . . . . . . . 11 2.6 interfacing to microprocessors with bi-dir ectional reset pins . . . . . . . . . . 12 3 typical operating char acteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4 maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5 dc and ac parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 6 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 7 part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 8 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
stm6321/6322stm6821/6822/6823/6824/6825 list of tables 3/26 list of tables table 1. device options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 table 3. pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 4. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 table 5. operating and ac measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 table 6. dc and ac characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 table 7. sot23-5 ? 5-lead small outline transistor package mechanical data. . . . . . . . . . . . . . . . . 22 table 8. ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 table 9. marking description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 table 10. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
list of figures stm6321/6322stm6821/6822/6823/6824/6825 4/26 list of figures figure 1. logic diagram (stm6821/6822/6823) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. logic diagram (stm6321/6322/6824/6825) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 3. stm6822/6823 sot23-5 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 4. stm6821 sot23-5 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 5. stm6322/6825 sot23-5 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 6. stm6321/6824 sot23-5 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 7. block diagram (stm6821/6822/6823) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 8. block diagram (stm6321/6824) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 9. block diagram (stm6322/6825) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 10. hardware hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 11. stm6321/6322/6822 open drain rst output with multiple supplies . . . . . . . . . . . . . . . . . 10 figure 12. ensuring rst valid to v cc = 0, (active-low push-pull outputs). . . . . . . . . . . . . . . . . . . . . . 12 figure 13. ensuring rst valid to v cc = 0, (active-high, push-pull outputs) . . . . . . . . . . . . . . . . . . . . 12 figure 14. interfacing to microprocessors with bi-directional reset i/o . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 15. v cc -to-reset output delay vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 16. supply current vs. temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 17. mr-to-reset output delay vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 18. normalized power-up t rec vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 19. normalized reset threshold voltage vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 20. normalized power-up watchdog time-out period . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 21. voltage output low vs. i sink . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 6 figure 22. voltage output high vs. i source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 23. maximum transient duration vs. reset threshold overdrive . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 24. ac testing input/output waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 25. mr timing waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 26. watchdog timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 27. sot23-5 ? 5-lead small outline transistor package mechanical drawing . . . . . . . . . . . . . . 22
stm6321/6322stm6821/6822/6823/6824/6825 summary description 5/26 1 summary description the stm6xxx supervisors are self-contained devices which provide microprocessor supervisory functions. a precision voltage reference and comparator monitors the v cc input for an out-of-tolerance condition. when an invalid v cc condition occurs, the reset output (rst ) is forced low (or high in the case of rst). these devices also offer a watchdog timer (except for stm6322/6825) and/or a push-button (mr ) reset input. these devices are available in a standard 5-pin sot23 package. figure 1. logic diagram (stm6821/6822/6823) 1. for stm6821 only. figure 2. logic diagram (stm6321/6322/6824/6825) 1. for stm6321/6824. table 2. signal names mr push-button reset input wdi watchdog input rst active-low reset output rst active-high reset output v cc supply voltage v ss ground ai09128 v cc stm6xxx v ss rst (rst) (1) wdi mr ai09129 v cc stm6xxx v ss rst rst (wdi) (1) mr
summary description stm6321/6322stm6821/6822/6823/6824/6825 6/26 figure 3. stm6822/6823 sot23-5 connections 1. open drain for stm6822. figure 4. stm6821 sot23-5 connections 1. push-pull only. figure 5. stm6322/6825 sot23-5 connections 1. open drain for stm6322. 2. push-pull only. figure 6. stm6321/6824 sot23-5 connections 1. open drain for stm6321. 2. push-pull only. 1 wdi rst (1) v cc mr v ss ai09130a sot23-5 2 3 4 5 1 wdi rst (1) v cc mr v ss ai12285 sot23-5 2 3 4 5 1 v cc v ss ai09131a sot23-5 2 3 4 5 mr rst (1) rst (2) 1 v cc v ss ai12286 sot23-5 2 3 4 5 wdi rst (1) rst (2)
stm6321/6322stm6821/6822/6823/6824/6825 summary description 7/26 1.1 pin descriptions 1.1.1 active-low, push-pull reset output (rst ) - stm6822/6823/6824/6825 pulses low when triggered, and stays low whenever v cc is below the reset threshold or when mr is a logic low. it remains low for t rec after either v cc rises above the reset threshold, the watchdog triggers a reset, or mr goes from low to high. 1.1.2 active-low, open dr ain reset output (rst ) - stm6321/6322/6822 pulses low when triggered, and stays low whenever v cc is below the reset threshold or when mr is a logic low. it remains low for t rec after either v cc rises above the reset threshold, the watchdog triggers a reset, or mr goes from low to high. connect a pull-up resistor to supply voltage. 1.1.3 push-butto n reset input (mr ) a logic low on mr asserts the reset output. reset remains asserted as long as mr is low and for t rec after mr returns high. this active-low input has an internal 52k pull-up. it can be driven from a ttl or cmos logic line, or shorted to ground with a switch. leave open if unused. 1.1.4 watchdog input (wdi) if wdi remains high or low for at least 1.6s, the internal watchdog timer expires and reset is asserted. the internal watchdog timer clears while reset is asserted or when wdi sees a rising or falling edge. the watchdog function can be disabled if wdi is left unconnected or is connected to a tri-state buffer output. 1.1.5 active-high reset output (rst) active-high, push-pull reset output; inverse of rst . table 3. pin functions pin name function stm6822 stm6823 stm6821 stm6321 stm6824 stm6322 stm6825 1?1 1rst active-low reset output 33?4mr push-button reset input 4 4 4 ? wdi watchdog input ? 1 3 3 rst active-high reset output 5555v cc supply voltage 2222v ss ground
summary description stm6321/6322stm6821/6822/6823/6824/6825 8/26 figure 7. block diagram (stm6821/6822/6823) 1. push-pull for stm6823, open drain for stm6822. 2. active-high (pus h-pull) for stm6821. figure 8. block diagram (stm6321/6824) 3. acive-low (open drain) for stm6321, active-low (push- pull) for stm6824. 4. push-pull only. figure 9. block diagram (stm6322/6825) 1. active-low (open drain) for stm6322, active-low (push-pull) for stm6825. 2. push-pull only. ai09132a v rst rst (rst) (1,2) watchdog timer wdi transitional detector compare t rec generator v cc wdi mr v cc a12287 v rst rst (1) watchdog timer wdi transitional detector compare t rec generator v cc wdi rst (2) ai12288 v rst rst (1) compare t rec generator v cc mr rst (2) v cc
stm6321/6322stm6821/6822/6823/6824/6825 summary description 9/26 figure 10. hardware hookup 1. for stm6321/6821/6822/6823/6824 2. for stm6322/6821/6822/6823/6825 3. for stm6821/ (rst output only) 4. for stm6321/6322/6824/6825 (both rst and rst outputs) ai09133 v cc v cc mr (2) 0.1 f stm6xxx wdi (1) rst (rst) (3) rst (4) to microprocessor reset from microprocessor push-button to microprocessor reset
operation stm6321/6322stm6821/6822/6823/6824/6825 10/26 2 operation 2.1 reset output the stm6xxx supervisor asserts a reset signal to the mcu whenever v cc goes below the reset threshold (v rst ), a watchdog time-out occurs, or when the push-button reset input (mr ) is taken low. reset is guaranteed valid for v cc < v rst down to v cc =1v for t a = 0c to 85c. during power-up, once v cc exceeds the reset threshold an internal timer keeps reset low for the reset time-out period, t rec . after this interval reset is de-asserted. each time rst is asserted, it stays low for at least the reset time-out period (t rec ). any time v cc goes below the reset threshold the internal timer clears. the reset timer starts when v cc returns above the reset threshold. 2.2 open drain rst output the stm6321/6322/6822 have an active-low, open drain reset output. this output structure will sink current when rst is asserted. connect a pull-up resistor from rst to any supply voltage up to 6v (see figure 11 ). select a resistor value large enough to register a logic low, and small enough to register a logic high while supplying all input current and leakage paths connected to the reset output line. a 10k pull-up resistor is sufficient in most applications. figure 11. stm6321/6322/6822 open drain rst output with multiple supplies 1. stm6322/6822 2. stm6321/6822 3. stm6321/6322 ai09137 stm6xxx rst mr (1) wdi (2) rst (3) gnd 10k v cc 5v system 5.0v 3.3v
stm6321/6322stm6821/6822/6823/6824/6825 operation 11/26 2.3 push-button reset input (stm6322/6821/6 822/6823/6825) a logic low on mr asserts reset. reset remains asserted while mr is low, and for t rec (see figure 25 on page 19 ) after it returns high. the mr input has an internal 52k pull-up resistor, allowing it to be left open if not used. this input can be driven with ttl/cmos-logic levels or with open-drain/collector outputs. connect a normally open momentary switch from mr to gnd to create a manual reset function; external debounce circuitry is not required. if mr is driven from long cables or the device is used in a noisy environment, connect a 0.1f capacitor from mr to gnd to provide additional noise immunity. mr may float, or be tied to v cc when not used. 2.4 watchdog input (s tm6321/6821/6822/6823/6824) the watchdog timer can be used to detect an out-of-control mcu. if the mcu does not toggle the watchdog input (wdi) within t wd (1.6sec), the reset is asserted. the internal watchdog timer is cleared by either: 1. a reset pulse, or 2. by toggling wdi (high-to-low or low-to-high), which can detect pulses as short as 50ns. the timer remains cleared and does not count for as long as reset is asserted. as soon as reset is released, the timer starts counting. note: the watchdog function may be disabled by floating wdi or tri-stating the driver connected to wdi. when tri-stated or disconnected, the maximum allowable leakage current is 10a and the maximum allowable load capacitance is 200pf. 2.5 applications information 2.5.1 watchdog input current the wdi input is internally driven through a buffer and series resistor from the watchdog counter. for minimum watchdog input current (minimum overall power consumption), leave wdi low for the majority of the watchdog time-out period. when high, wdi can draw as much as 160a. pulsing wdi high at a low duty cycle will reduce the effect of the large input current. when wdi is left unconnected, the watchdog timer is serviced within the watchdog time-out period by a low-high-low pulse from the counter chain. 2.5.2 ensuring a valid re set output down to v cc =0v the stm6xxx supervisors are guaranteed to operate properly down to v cc = 1v. in applications that require valid reset levels down to v cc = 0, a pull-down resistor to active- low outputs (push/pull only, see figure 12 on page 12 ) and a pull-up resistor to active-high outputs (push/pull only, see figure 13 on page 12 ) will ensure that the reset line is valid while the reset output can no longer sink or source current. this scheme does not work with the open drain outputs of the stm6321/6322/6822. the resistor value used is not critical, but it must be large enough not to load the reset output when v cc is above the reset threshold. for most applications, 100k is adequate.
operation stm6321/6322stm6821/6822/6823/6824/6825 12/26 figure 12. ensuring rst valid to v cc = 0, (active-low push-pull outputs) figure 13. ensuring rst valid to v cc = 0, (active-high, push-pull outputs) 1. this configuration does not work on open drain outputs of the stm6321/6322/6822. 2.6 interfacing to microprocessors with bi-directional reset pins microprocessors with bi-directional re set pins can contend with the stm6321 / 6322 / 6821 / 6822 / 6823 / 6824 / 6825 reset output. for example, if the reset output is driven high and the microprocessor wants to pull it low, signal contention will re sult. to prevent this from occurring, connect a 4.7k resistor between the reset outp ut and the microp rocessor?s reset i/o as in figure 14 . figure 14. interfacing to microprocessors with bi-directional reset i/o ai09138 stm6xxx rst gnd v cc v cc r1 ai09139 stm6xxx rst gnd v cc v cc r1 ai09135 stm6xxx rst gnd 4.7k v cc microprocessor rst buffered reset to other system components gnd v cc
stm6321/6322stm6821/6822/6823/6824/6825 typical operating characteristics 13/26 3 typical operating characteristics figure 15. v cc -to-reset output delay vs. temperature figure 16. supply current vs. temperature temperature (?c) reset output delay (?) ai09627a 0 5 10 15 20 25 30 35 ?40 ?20 0 20 40 60 80 temperature (?c) supply current (?) v cc = 3v v cc = 5v ai09628a 0 1 2 3 4 5 6 7 ?40 ?20 0 20 40 60 80
typical operating characteristics stm6321/6322stm6821/6822/6823/6824/6825 14/26 figure 17. mr -to-reset output delay vs. temperature figure 18. normalized power-up t rec vs. temperature temperature (?c) reset output delay (ns) ai09669 0 100 200 300 400 500 600 ?40 ?20 0 20 40 60 80 temperature (?c) normalized power-up t rec ai09670 0.99 1.00 1.01 1.02 1.03 1.04 1.05 ?40 ?20 0 20 40 60 80
stm6321/6322stm6821/6822/6823/6824/6825 typical operating characteristics 15/26 figure 19. normalized reset threshold voltage vs. temperature figure 20. normalized power-up watchdog time-out period temperature (?c) normalized reset threshold voltage ai09631a 0.95 0.96 0.97 0.98 0.99 1.00 1.01 1.02 1.03 1.04 1.05 ?40 ?20 0 20 40 60 80 temperature (?c) normalized watchdog time-out period ai09671 0.99 1.00 1.01 1.02 1.03 1.04 1.05 ?40 ?20 0 20 40 60 80
typical operating characteristics stm6321/6322stm6821/6822/6823/6824/6825 16/26 figure 21. voltage output low vs. i sink figure 22. voltage output high vs. i source i sink (ma) v out (v) v cc = 2.9v ai09634a 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0123456 i source (ma) v out (v) ai09635a 2.74 2.76 2.78 2.80 2.82 2.84 2.86 2.88 2.90 2.92 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 v cc = 2.9v
stm6321/6322stm6821/6822/6823/6824/6825 typical operating characteristics 17/26 figure 23. maximum transient duration vs. reset threshold overdrive reset threshold overdrive (mv) transient duration (?) ai09637a 0 5 10 15 20 25 30 35 0 20 40 60 80 100 120 140 160 180 200 s z l
maximum rating stm6321/6322stm6821/6822/6823/6824/6825 18/26 4 maximum rating stressing the device above the rating listed in the ta bl e 4 may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operat ing sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. refer also to the stmicroe lectronics sure program and other relevant quality documents. table 4. absolute maximum ratings symbol parameter value unit t stg storage temperature (v cc off) ?55 to 150 c t sld (1) 1. reflo w at peak temperature of 260c (total thermal budget not to exceed 245c for greater than 30 seco nds). lead solder temperature for 10 seconds 260 c v io input or output voltage ?0.3 to v cc +0.3 v v cc supply voltage ?0.3 to 7.0 v i o output current 20 ma p d power dissipation 320 mw
stm6321/6322stm6821/6822/6823/6824/6825 dc and ac parameters 19/26 5 dc and ac parameters this section summarizes the operating measurement conditions, and the dc and ac characteristics of the device. the parameters in the dc and ac characteristics tables that follow, are derived from tests performed under the measurement conditions summarized in ta bl e 5 . designers should check that the operating conditions in their circuit match the operating conditions when relying on the quoted parameters. table 5. operating and ac measurement conditions figure 24. ac testing input/output waveforms figure 25. mr timing waveform 1. rst for stm6322/6821/6825. figure 26. watchdog timing parameter stm6xxx unit v cc supply voltage 1.0 to 5.5 v ambient operating temperature (t a )?40 to 85c input rise and fall times 5ns input pulse voltages 0.2 to 0.8v cc v input and output timing ref. voltages 0.3 to 0.7v cc v ai02568 0.8v cc 0.2v cc 0.7v cc 0.3v cc ai07837a rst (1) mr tmlrl trec tmlmh ai09136 rst wdi v cc trec twd
dc and ac parameters stm6321/6322stm6821/6822/6823/6824/6825 20/26 table 6. dc and ac characteristics sym alter- native description test condition (1) min typ max unit v cc operating voltage 1.2 (2) 5.5 v i cc v cc supply current (mr and wdi unconnected) t/s/r/z (v cc < 3.6v) 4 12 a l/m (v cc < 5.5v) 6 17 a v cc supply current (mr unconnected; stm6322/6825) t/s/r/z (v cc < 3.6v) 3 8 a l/m (v cc < 5.5v) 3 12 a i li input leakage current 0v = v in = v cc ?1 +1 a input leakage current (wdi) (3) wdi = v cc , time average 120 160 a wdi = gnd, time average ?20 ?15 a i lo open drain reset output leakage current v cc > v rst , reset not asserted ?1 +1 a v ih input high voltage (mr ) v rst > 4.0v 2.0 v v rst < 4.0v 0.7v cc v v ih input high voltage (wdi) (4) v rst (max) < v cc < 5.5v 0.7v cc v v il input low voltage (mr ) v rst > 4.0v 0.8 v v rst < 4.0v 0.3v cc v v il input low voltage (wdi) (4) v rst (max) < v cc < 5.5v 0.3v cc v v ol output low voltage (rst ; push-pull or open drain) v cc 1.0v, i sink = 50a, reset asserted 0.3 v v cc 1.2v, i sink = 100a, reset asserted 0.3 v v cc 2.7v, i sink = 1.2ma, reset asserted 0.3 v v cc 4.5v, i sink = 3.2ma, reset asserted 0.4 v output low voltage (rst; push-pull only) v cc 2.7v, i sink = 1.2ma, reset not asserted 0.3 v v cc 4.5v, i sink = 3.2ma, reset not asserted 0.4 v v oh output high voltage (rst ) v cc 2.7v, i source = 500a, reset not asserted 0.8v cc v v cc 4.5v, i source = 800a , reset not asserted 0.8v cc v output high voltage (rst) v cc 1.0v, i source = 1a, reset asserted (0c to 85c) 0.8v cc v v cc 1.5v, i source = 100a, reset asserted 0.8v cc v v cc 2.55v, i source = 500a, reset asserted 0.8v cc v v cc 4.25v, i source = 800a, reset asserted 0.8v cc v
stm6321/6322stm6821/6822/6823/6824/6825 dc and ac parameters 21/26 reset thresholds v rst (5) reset threshold stm6xxxl 25c 4.561 4.630 4.699 v ?40 to 85c 4.514 4.746 v stm6xxxm 25c 4.314 4.390 4.446 v ?40 to 85c 4.270 4.490 v stm6xxxt 25c 3.040 3.080 3.110 v ?40 to 85c 3.000 3.150 v stm6xxxs 25c 2.890 2.930 2.960 v ?40 to 85c 2.857 3.000 v stm6xxxr 25c 2.590 2.630 2.660 v ?40 to 85c 2.564 2.696 v stm6xxxz (6) 25c 2.280 2.320 2.350 v ?40 to 85c 2.250 2.380 v reset threshold hysteresis l/m versions 10 mv t/s/r/z versions 5 mv v cc to rst delay (v rst ? v cc = 100mv, v cc falling at 1mv/s) 20 s t rec (7) reset pulse width a11.42ms blank 140 200 280 ms j 240 280 480 ms reset threshold temperature coefficient 40 ppm /c push-button reset input t mlmh t mr mr pulse width 1 s t mlrl t mrd mr to rst output delay 500 ns mr glitch immunity 100 ns mr pull-up resistor 35 52 75 k watchdog timer t wd (7) watchdog timeout period 1.12 1.60 2.24 s wdi pulse width 50 ns 1. valid for ambient operating temperature: t a = ?40 to 85c; v cc = 4.5 to 5.5v for ?l/m? versions; v cc = 2.7 to 3.6v for ?t/s/r? versions; and v cc = 2.1 to 2.75v for ?z? version (except where noted). 2. v cc (min) = 1.0v for ta = 0 to +85c. 3. wdi input is designed to be driven by a three-state output device. to float wdi, the ?high-impedance mode? of the output device must have a maximum leakage current of 10a and a maximum output capacitance of 200pf. the output device must also be able to source and sink at least 200a when active. 4. wdi is internally serviced within the watchdog period if wdi is left unconnected. 5. the leakage current measured on the rst pin is test ed with the reset asserted (output high impedance). 6. contact local sales office for availability. 7. other t rec and watchdog timings are offered. mini mum order quantities may apply. contact local sales office for availability. sym alter- native description test condition (1) min typ max unit
package mechanical data stm6321/6322stm6821/6822/6823/6824/6825 22/26 6 package mechanical data figure 27. sot23-5 ?5-lead small outline transistor package mechanical drawing 1. drawing is not to scale. table 7. sot23-5 ?5-lead small outline transistor package mechanical data symb mm inches typ min max typ min max a 1.200 0.900 1.450 0.0472 0.0354 0.0571 a1 0.150 0.0059 a2 1.050 0.900 1.300 0.0413 0.0354 0.0512 b 0.400 0.350 0.500 0.0157 0.0138 0.0197 c 0.150 0.090 0.200 0.0059 0.0035 0.0079 d 2.900 2.800 3.000 0.1142 0.1102 0.1181 d1 1.900 0.0748 e 2.800 2.600 3.000 0.1102 0.1024 0.1181 e 0.950 0.0374 f 1.600 1.500 1.750 0.0630 0.0591 0.0689 k010010 l 0.350 0.100 0.600 0.0138 0.0039 0.0236 sot23-5 cp a c a2 a1 d1 d e b e l k f
stm6321/6322stm6821/6822/6823/6824/6825 part numbering 23/26 7 part numbering table 8. ordering information scheme for other options, or for more information on any aspect of this device, please contact the st sales office nearest you. example: stm6xxx lwy6e device type stm6xxx reset threshold voltage l: v rst = 4.514 to 4.746v m: v rst = 4.270 to 4.490v t: v rst = 3.000 to 3.150v s: v rst = 2.850 to 3.000v r: v rst = 2.564 to 2.696v z: v rst = 2.250 to 2.380v (1) 1. contact local sales office for availability. reset pulse width (2) 2. contact local sales office for availability. other t rec and watchdog timings are o ffered. minimum order quantities may apply. contact local sales office for availability. a: t rec = 1 to 2ms blank: t rec = 140 to 280ms j: t rec = 240 to 480ms package wy = sot23-5 temperature range 6 = ?40 to 85c shipping method e = ecopack package, tubes f = ecopack package, tape & reel
part numbering stm6321/6322stm6821/6822/6823/6824/6825 24/26 table 9. marking description note: where ?x? = assembly work week (a to z), such that ?a? = ww01-02, ?b? = ww03-04, and so forth. part number reset threshold (v) rese t pulse width (ms) topside marking stm6321lwy6f 4.630 200 5aux stm6321mawy6f 4.390 1.4 5crx stm6321mwy6f 4.390 200 5avx stm6321twy6f 3.080 200 5awx stm6321swy6f 2.930 200 5axx stm6321rwy6f 2.630 200 5ayx stm6322lwy6f 4.630 200 5bax stm6322mwy6f 4.390 200 5bbx stm6322twy6f 3.080 200 5bcx stm6322swy6f 2.930 200 5bdx stm6322rwy6f 2.630 200 5bex stm6821lwy6f 4.630 200 5bgx stm6821mwy6f 4.390 200 5bhx stm6821twy6f 3.080 200 5bjx stm6821swy6f 2.930 200 5bkx stm6821rwy6f 2.630 200 5blx stm6822lwy6f 4.630 200 5bnx stm6822mwy6f 4.390 200 5bpx stm6822twy6f 3.080 200 5bqx stm6822swy6f 2.930 200 5brx stm6822rwy6f 2.630 200 5bsx stm6823lwy6f 4.630 200 5bux stm6823mwy6f 4.390 200 5bvx stm6823tjwy6f 3.080 280 5cmx stm6823twy6f 3.080 200 5bwx stm6823sjwy6f 2.930 280 5cnx stm6823swy6f 2.930 200 5bxx stm6823rjwy6f 2.630 280 5cpx stm6823rwy6f 2.630 200 5byx stm6824lwy6f 4.630 200 5cax stm6824mwy6f 4.390 200 5cbx stm6824twy6f 3.080 200 5ccx stm6824swy6f 2.930 200 5cdx stm6824rwy6f 2.630 200 5cex stm6825lwy6f 4.630 200 5cgx stm6825mwy6f 4.390 200 5chx stm6825twy6f 3.080 200 5cjx stm6825swy6f 2.930 200 5ckx stm6825rwy6f 2.630 200 5clx
stm6321/6322stm6821/6822/6823/6824/6825 revision history 25/26 8 revision history table 10. document revision history date revision changes august 25, 2004 1.0 first draft 15-dec-04 2.0 update characteristics ( figure 15 , 16 , 17 ; ta bl e 6 , and 8 ) 10-mar-05 3.0 document promoted to datasheet status 17-jun-05 4.0 package marking update ( ta bl e 9 ) 11-apr-06 5 update characteristics, lead- free text, availability ( figure 3 , 4 , 5 , 6 , 7 , 8 , and 9 ; ta b l e 1 , 6 , 8 , and 9 ) 11-aug-2006 6 update summary description , ta b l e 8 , and 9 . 25-may-2007 7 formatting changes, updated ta b l e 9 .
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